Fermi ES-7116 Octal Scaler

CAMAC Blind Scaler for Beam Line Monitoring System

Function Description

This card provides the means of gathering the digital beam profile information from the amplifier cards of the proportional wire chambers (PWC) of the NAL Beam Line Monitoring System (BELIMOS). This module is normally supplied in an (8) 12 bit 32 MHz blind scaler configuration, however, there is an internal jumper option available to convert this module to a (4) 24 bit blind scaler configuration.

Since the CAMAC dataway has 24 read lines (Rl-R24), (2) 12 bit scalers are read out by a single dataway read operation. The odd number scalers (1, 3, 5, 7) use read lines Rl-Rl2 with read line R12 being the most significant bit (MSB). The even number scalers (2, 4, 6 8) use the read lines R13-R24 with read line R24 being the most significant bit (MSB). The CAMAC subaddress lines (A) are used to select the group of scalers being read out.

Each-group of scalers (1 and 2, 3 and 4, 5 and 6, 7 and 8) has an enable/disable latch used to enable or disable that particular group in counting. The state of these four latches are controlled by standard CAMAC dataway command operations and are indicated by front panel LED'S.

In addition to these four enable/disable latches, there is a master count latch which controls the counting capability of the entire module. This latch is set in the disable state whenever any of the individual scalers of the module reaches an overflow condition. This will in effect cause all of the values of the scalers to be "frozen"at this time. There is also (2) front panel Lemo connectors (DISABLE COUNT) which can be used to inter- connect a group of scaler modules together or form a block. If a scaler of any module within this block over- flows, the master count latch of all the modules will be set to the disable state. The state of this master count latch is indicated by a front panel LED.

Each module has a LAM request register and a LAM mask register. Whenever a scaler overflow condition exists, the LAM request register is set. This LAM request is transmitted-to the dataway L line if the LAM mask is not set. The status of the LAM request and mask registers are indicated by front panel LED's and can also be tested by using dataway status test commands.

Operational Description

A. Input

The input of the scalers is TTL negative true logic, i.e., 0V -> "1" and > 3.5V -> "0". There are provisions on the card for input resistors required for the proper data cable termination. The input to the scalers are accessible either via (8) front panel LEMO connectors or a rear panel 52 pin double D connector.

Commands

Function

Command

Comments

Read Scaler

F(0)-A(0-3)

Read scalers are function of A A(0) -- Scaler 1 and 2 A(1) -- Scaler 3 and 4 A(2) -- Scaler 5 and 6 A(3) -- Scaler 7 and 8

Read and clear scaler

F(2)-A(0-3)

Same as F(0) above except the addressed scalers are cleared on the S2 strobe.

Test LAM

F(8)-A(4)

Q=1 is the LAM request register is set and the Lam mask is not set.

Clear Scaler

F(9)-A(0-3)

Clear addressed scalers and LAM request register.

Clear all scalers

F(9)-A(4)

Clear all scalers and LAM request register.

Reset LAM request register.

F(10)-A(4)

Reset the LAM request register.

Master Count Enable

F(11)-A(4)

Enable master count latch.

Disable scaler

F(24)-A(0-3)

Disable addressed group of scalers.

Set LAM mask

F(24)-A(4)

Set LAM mask register.

Increment all scalers

F(25)-A(4)

All scalers are enabled and increment count by one.

Reset LAM mask

F(26)-A(4)

Reset LAM mask register.

Test LAM request register.

F(27)-A(4)

Q=1 is the LAM request register set.

Clear (Dataway C)

C-S2

Common control line clears all scalers, enables master count latch, and ressets LAM request register.

Initialize (Dataway Z)

Z-S2

Common control line clears all scalers, enables master count latch,enables all scalers, and ressets LAM request and mask register.

Inhibit (Dataway I)

I

Common control line inhibits counting of all scalers if the front panel switch is in the I enable position.

All of the above commands except C, Z, and I will cause an X - 1 response to be generated.

A Q = 1 response will be generated for F(O)-A(0-3) and the F(2)-A(0-3) commands and a conditional Q response is generated for either the F(8)-A(4) or F(27)-A(4) commands.

Hardware Identification

A. Connectors
1. (8) front panel scaler input Lemo connectors (INPUT 1-8).
2. (2) Front panel disable count Lemo connectors (DISABLE COUNT)
3. (1) rear panel 52 pin double D input connector.

B. Switches - Front Panel
1. Manual clear pushbutton switch C
The switch performs the same function as the dataway clear command (C).
2. I Disable/Enable locking toggle switch.
The switch will either enable or disable the action of the dataway inhibit line (I).

C. LED's>
1. (4) scaler enable (ENABLE). Indicates if a group of two scalers are enabled.
2.master count enabled (COUNT ENABLED). Indicates the master count latch is in the enabled state.
3. (1) LAM request register (LAM). indicates the state of the LAN request register.
4. (1) LAM mask register (MASK). Indicates the state of the LAM mask register.

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Function	Command	Comments
Read Scaler	F(0)-A(0-3)	Read scalers are function of A A(0) -- Scaler 1 and 2 A(1) -- Scaler 3 and 4 A(2) -- Scaler 5 and 6 A(3) -- Scaler 7 and 8
Read and clear scaler	F(2)-A(0-3)	Same as F(0) above except the addressed scalers are cleared on the S2 strobe.
Test LAM	F(8)-A(4)	Q=1 is the LAM request register is set and the Lam mask is not set.
Clear Scaler	F(9)-A(0-3)	Clear addressed scalers and LAM request register.
Clear all scalers	F(9)-A(4)	Clear all scalers and LAM request register.
Reset LAM request register.	F(10)-A(4)	Reset the LAM request register.
Master Count Enable	F(11)-A(4)	Enable master count latch.
Disable scaler	F(24)-A(0-3)	Disable addressed group of scalers.
Set LAM mask	F(24)-A(4)	Set LAM mask register.
Increment all scalers	F(25)-A(4)	All scalers are enabled and increment count by one.
Reset LAM mask	F(26)-A(4)	Reset LAM mask register.
Test LAM request register.	F(27)-A(4)	Q=1 is the LAM request register set.
Clear (Dataway C)	C-S2	Common control line clears all scalers, enables master count latch, and ressets LAM request register.
Initialize (Dataway Z)	Z-S2	Common control line clears all scalers, enables master count latch,enables all scalers, and ressets LAM request and mask register.
Inhibit (Dataway I)	I	Common control line inhibits counting of all scalers if the front panel switch is in the I enable position.