3527 32-channel, Autoranging A/D Converter

FEATURES

 

APPLICATIONS

 

GENERAL DESCRIPTION

 

The Model 3527 is a single-width CAMAC module that converts 32 analog voltages into equivalent digital values and stores these values in local memory.

 

Channels are continuously being scanned in sequence under microprocessor control. When a channel is monitored, the module first checks the input level and adjusts the range (+/-10 mV to +/-10.24 V) so that the signal is between half scale and full scale. Then 64 equally spaced readings are averaged over 1/60th of a second to provide digital filtering of 60 hertz (50 hertz for the 3527-V1B) and harmonics by at least 35 decibels. This results in a processing time of 20 milliseconds per channel and 640 milliseconds for 32 channels (23 milliseconds and 740 milliseconds for the 3527-V1B). A fast-scan mode (generally used for “tweaking” purposes) provides a four millisecond/channel rate but does no digital filtering.

 

A 12-bit ADC is used for data conversion. Additionally, a 4-bit DAC with a full-scale output equal to two LSBs of the ADC is stepped each time a reading is taken. The DAC output is summed with the input signal. This process is called “dithering” and extends the resolution to 14 bits.

 

A calibration cycle and AC “ripple” measurement are performed at alternate one-minute intervals. Each of these operations requires approximately 60 milliseconds, and an X = 0 response is given to any command during the calibration and AC measurement cycles.

 

INPUT SPECIFICATIONS

 

Range Selection: +/-10 mV to +/-10.24 V, autoranging

DC Resolution: Monotonic to 14 bits

Initial Accuracy: >0.05% of reading +/-20 V (normal Scan)

>0.2% of reading +/-40 V (fast scan)

Drift: <0.01% of reading per month

Temperature: Stated accuracy, 0 to 50 degree C

Common-Mode Voltage: <10.3 V, normal plus common mode voltage

Absolute Maximum Voltage 40 VDC (continuous)

100 VDC (one second duration)

 

Notes:

 

  1. The initial channel address is selected by an F(17) Write operation. Then, the selected channel is read with a pair of F(0) operations. The channel address is auto-incremented after each pair of Read operations; therefore, all 32 channels are read with 64 CAMAC Read operations. The Subaddress (I) is ignored for the F(17) and F(0) operations (i.e., Subaddress 0 through 15 give the same result).
  2. The order shown here follows the DEC single-precision, floating point format. If the IBM format has been software-selected, the Read operations are reversed (i.e., the “LS Fraction” word appears first).
  3. The AC “ripple” and input range are also provided in the “LS Fraction” word for additional information.
  4. The first F(0) Read after the F(17) channel selection must occur within 75 milliseconds and subsequent F(0) operations within 75 milliseconds of each other to insure proper channel acquisition. Q = 0 will be returned if the interval has expired. A period of 200 milliseconds or more should be allowed between block Read operations so that “new” data is available from the microprocessor. Shorter period will prevent microprocessor updating.

POWER REQUIREMENTS

 

+6 volts — 1100 mA

+/-24 volts — 40 mA

 

Weight: .50 kg. (1 lb. 2 oz.)

 

ORDERING INFORMATION

 

Model 3527-V1A — 32-channel, Autoranging A/D Converter — 60 hertz Operation

Model 3527-V1B — 32-channel, Autoranging A/D Converter — 50 hertz Operation

 

Accessories:

 

Model 5855-Axyz Cable Assembly (two required)

Model 5944-Z1A Mating Connector

Model 1854-A2A Rack Termination Panel and Model 5855-B30J Cable (two cables required)

 

 


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