LeCroy 2249SG 12 Channel Sep Gate ADC

CAMAC Model 2249SG 12-Channel A-to-D Converter With Separate Gates

The LeCroy Model 2249SG 12-Channel Analog-to-Digital Converter is a separately gated version of the world's most widely used integrating ADC, the Lecroy Model 2249A. It embodies all the operational characteristics which have proved important for general-purpose use in high energy particle physics, including high resolution, high sensitivity, excellent stability, fast digitizing rate, LAM and Q suppression, provision for fast clear, calibrating test mode, and flexible LAM options.

The Model 2249SG contains twelve complete ADC's in a double-width CAMAC module. Each ADC offers a 10-bit conversion to provide a wide 1024-channel dynamic range. The input sensitivity of the Model 2249SG is 0.25 pC/count for a full-scale range of 256 pC. This is compatible with most available signal sources and no additional buffering or reshaping of any kind is required to digitize nanosec- ond pulses.

The excellent long-term stability, temperature characteristics, and isolation between ADC channels assure accurate and reliable performance under the demanding conditions encountered in actual experiments. Confirmation of operation and cal- ibration is provided by a unique optional test feature which allows all twelve ADC's or an entire system to simultaneously digitize a charge proportional to a dc level provided to a front-panel Lemo connector or patched into Pi, P2, or P5 of the Dataway connector.

The Model 2249SG offers excellent event rate capability through the incorporation of a fast clear and a fast digitizing rate. The fast clear input enables each ADC to begin digitizing on the command of a prompt gate and be reset, if necessary, before the end of conversion on the basis of delayed logic or chamber information. This feature eliminates the long input delay cables now required in these situations.

End of conversion of modules which contain data is flagged by generation of a CAMAC LAM. Readout of modules which do not contain information can be elimi- nated either by use of the LAM signals or through Q suppression.

SPECIFICATIONS MODEL 2249SG 12-CHANNEL ADC WITH SEPARATE GATES

Analog Inputs:

Twelve, Lemo-type connectors; charge-sensitive (current-integrating); direct-coupled, quiescently at ap- proximately +4 mV; 50 Ohm impedance; linear range normally -2 mV to -1 V; protected to +/- 50 volts against 1 usec transients.

Full-Scale Range:

256 pC +/- 5%.

Full-Scale Uniformity:

5%.

Integral Non-linearity:

0.25% of reading +/- 0.5 pC for > 500 Ohm source.

ADC Resolution:

10 bits (0.1%) somewhat degraded to approx. 0.2% by clock unsynchronized with any specific linear gate input.

Long-Term Stability:

Better than 0.25% of reading +/-0.5 pC/week (at constant temperature).

Temperature Coefficient:

Typical, 0; max., +/-(.03% of reading (in pC) +0.002 t) pC/'C (where t=gate duration in nanoseconds, with 50 Ohm reverse termination).

ADC Isolation:

A 5-volt, 20 nsec overload pulse in any one ADC disturbs data in any other ADC by no more than 0.25 PC.

Gate Inputs:

Twelve, one per ADC; Lemo-type connectors; 50 Ohm impedance; -1.4 V or greater enables; minimum duration, 10 nsec; maximum recommended duration, 200 nsec (actual limit approximately 2 microseconds with reduced accuracy; partial analog input must occur within 0.5 usec after opening each gate to preserve accuracy), effective opening and closing times; 2 nsec; internal delay, 2 nsec. All gates should occur within 2 usec of the "start" pulse (other arrangements require internal resistor change).

CAUTION: Subsequent gate signals are NOT INHIBITED after receipt of the first one, so care must be taken to externally prevent the application of more than one gate to each channel until a clear is applied.

Start Input:

A NIM level (> -600 mV) signal of a duration exceeding 10 nsec must be applied to start the internal oscillator. It should be applied simultaneous to the earliest gate pulse or should follow it by no more than 100 nsec.

Fast Clear:

One front-panel input common to all ADC'S; Lemo-type connector 50 Ohm impedance; -600 mV or greater clears, minimum duration, 50 nsec. (Caution: narrower pulses cause partial clearing.) Requires additional 1.5 usec settling time after clear.

Test Function:

The standard 2249SG does not respond to F(25) and has no test feature. However, on-line test capability is optional at the expense of the CAMAC "Inhibit". With 07 (the "inhibit" transistor) removed, the leading edge of a pulse applied to the "start" input will cause a fixed charge to be injected onto the 2249SG analog inputs. Coincident with the "start," the 12 gate pulses must be applied of duration approximately 80 nsec. Proportionality constant is -12.5 pc/volt of dc signal applied to P1, P2 or P5 patch points, for an 80 nsec gate. In this test mode, the gates must precede the "start" by 10 nsec.

Digitizing Time:

Approximately 60 usec.

Readout Time:

Readout may proceed at the fastest rate permitted by the CAMAC standard after digitization is complete.

Readout Control:

Ready for readout when LAM signal appears. Refer to ESONE Committee Report EUR4100e and EUR4600e or IEEE #583 for additional timing details, voltages, logic levels, impedances, and other standards.

Data:

The proper CAMAC function and address command normally gates the 10 binary bits plus overflow bit of the selected channel onto the R1 to R11 (2' to 2^10) Dataway bus lines.

CAMAC Commands:

Z or C:

ADC's and LAM are cleared by the CAMAC "Clear" or "Initialize" command; requires S2. Z also disables LAM.

1:

Gate input is inhibited during CAMAC "Inhibit" command. (Nonfunctional if unit is modified to provide "Test" feature.)

0:

A Q=1 response is generated in recognition of an F(O) or F(2) Read function or an F(8) function if LAM is set for a valid "N" and "A", but there will be no response (Q=0) under any other condition. The Q response for empty modules can be suppressed. (See Q and LAM suppression.)

X:

An X=l (Command Accepted) response is generated when a valid F, N, and A command is generated.

L:

A Look-At-Me signal is generated from end of conversion until a module Clear or Clear LAM. LAM is disabled for the duration of N, can be permanently enabled or disabled by the Enable and Disable function command, and can be tested by Test LAM. Standard option causes LAM to be suppressed for empty modules.

CAMAC Function Codes:

F(O):

Read registers; requires N and A, A(O) through A(11) are used for channel addresses.

F(2) :

Read registers and Clear module and LAM; re res N and A; (Clears on A(l 1) only.)

F(8):

Test Look-At-Me; requires N and any A from A(0) to A(11) independent of Disable Look-At-Me. Q response is generated if LAM is set.

F(9):

Clear module and LAM; requires N, S2, and any A from A(O) to A(11).

F(10):

Clear Look-At-Me; requires N, S2, and A from A(O) to A(11)

F(24):

Disable Look-At-Me; requires N,S2, and any A from A(O) to A(11).

F(26):

Enable Look-At-Me; requires N, S2, and any A from A(O) to A(11). Remains enabled until Z or F(24) applied.

Caution: The state of the LAM mask will be arbitrary after power turn-on.

Q and LAM Suppression:

Adjustable potentiometer (accessed from side of module) sets count level required (from 0 to 100) before data is considered useful. A module in which all channels contain less than set amount will produce no Q-response or LAM and appears during readout as an empty CAMAC slot, thus reducing readout time. A Command Accepted response is still generated. The LAM suppress portion can be disabled with a solder jumper option.

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Analog Inputs:	Twelve, Lemo-type connectors; charge-sensitive (current-integrating); direct-coupled, quiescently at ap- proximately +4 mV; 50 Ohm impedance; linear range normally -2 mV to -1 V; protected to +/- 50 volts against 1 usec transients.
Full-Scale Range:	256 pC +/- 5%.
Full-Scale Uniformity:	5%.
Integral Non-linearity:	0.25% of reading +/- 0.5 pC for > 500 Ohm source.
ADC Resolution:	10 bits (0.1%) somewhat degraded to approx. 0.2% by clock unsynchronized with any specific linear gate input.
Long-Term Stability:	Better than 0.25% of reading +/-0.5 pC/week (at constant temperature).
Temperature Coefficient:	Typical, 0; max., +/-(.03% of reading (in pC) +0.002 t) pC/'C (where t=gate duration in nanoseconds, with 50 Ohm reverse termination).
ADC Isolation:	A 5-volt, 20 nsec overload pulse in any one ADC disturbs data in any other ADC by no more than 0.25 PC.
Gate Inputs:	Twelve, one per ADC; Lemo-type connectors; 50 Ohm impedance; -1.4 V or greater enables; minimum duration, 10 nsec; maximum recommended duration, 200 nsec (actual limit approximately 2 microseconds with reduced accuracy; partial analog input must occur within 0.5 usec after opening each gate to preserve accuracy), effective opening and closing times; 2 nsec; internal delay, 2 nsec. All gates should occur within 2 usec of the "start" pulse (other arrangements require internal resistor change).
CAUTION: Subsequent gate signals are NOT INHIBITED after receipt of the first one, so care must be taken to externally prevent the application of more than one gate to each channel until a clear is applied.
Start Input:	A NIM level (> -600 mV) signal of a duration exceeding 10 nsec must be applied to start the internal oscillator. It should be applied simultaneous to the earliest gate pulse or should follow it by no more than 100 nsec.
Fast Clear:	One front-panel input common to all ADC'S; Lemo-type connector 50 Ohm impedance; -600 mV or greater clears, minimum duration, 50 nsec. (Caution: narrower pulses cause partial clearing.) Requires additional 1.5 usec settling time after clear.
Test Function:	The standard 2249SG does not respond to F(25) and has no test feature. However, on-line test capability is optional at the expense of the CAMAC "Inhibit". With 07 (the "inhibit" transistor) removed, the leading edge of a pulse applied to the "start" input will cause a fixed charge to be injected onto the 2249SG analog inputs. Coincident with the "start," the 12 gate pulses must be applied of duration approximately 80 nsec. Proportionality constant is -12.5 pc/volt of dc signal applied to P1, P2 or P5 patch points, for an 80 nsec gate. In this test mode, the gates must precede the "start" by 10 nsec.
Digitizing Time:	Approximately 60 usec.
Readout Time:	Readout may proceed at the fastest rate permitted by the CAMAC standard after digitization is complete.
Readout Control:	Ready for readout when LAM signal appears. Refer to ESONE Committee Report EUR4100e and EUR4600e or IEEE #583 for additional timing details, voltages, logic levels, impedances, and other standards.
Data:	The proper CAMAC function and address command normally gates the 10 binary bits plus overflow bit of the selected channel onto the R1 to R11 (2' to 2^10) Dataway bus lines.
CAMAC Commands:
Z or C:	ADC's and LAM are cleared by the CAMAC "Clear" or "Initialize" command; requires S2. Z also disables LAM.
1:	Gate input is inhibited during CAMAC "Inhibit" command. (Nonfunctional if unit is modified to provide "Test" feature.)
0:	A Q=1 response is generated in recognition of an F(O) or F(2) Read function or an F(8) function if LAM is set for a valid "N" and "A", but there will be no response (Q=0) under any other condition. The Q response for empty modules can be suppressed. (See Q and LAM suppression.)
X:	An X=l (Command Accepted) response is generated when a valid F, N, and A command is generated.
L:	A Look-At-Me signal is generated from end of conversion until a module Clear or Clear LAM. LAM is disabled for the duration of N, can be permanently enabled or disabled by the Enable and Disable function command, and can be tested by Test LAM. Standard option causes LAM to be suppressed for empty modules.
CAMAC Function Codes:
F(O):	Read registers; requires N and A, A(O) through A(11) are used for channel addresses.
F(2) :	Read registers and Clear module and LAM; re res N and A; (Clears on A(l 1) only.)
F(8):	Test Look-At-Me; requires N and any A from A(0) to A(11) independent of Disable Look-At-Me. Q response is generated if LAM is set.
F(9):	Clear module and LAM; requires N, S2, and any A from A(O) to A(11).
F(10):	Clear Look-At-Me; requires N, S2, and A from A(O) to A(11)
F(24):	Disable Look-At-Me; requires N,S2, and any A from A(O) to A(11).
F(26):	Enable Look-At-Me; requires N, S2, and any A from A(O) to A(11). Remains enabled until Z or F(24) applied.
Caution: The state of the LAM mask will be arbitrary after power turn-on.
Q and LAM Suppression:	Adjustable potentiometer (accessed from side of module) sets count level required (from 0 to 100) before data is considered useful. A module in which all channels contain less than set amount will produce no Q-response or LAM and appears during readout as an empty CAMAC slot, thus reducing readout time. A Command Accepted response is still generated. The LAM suppress portion can be disabled with a solder jumper option.