LeCroy 2249W 12 Channel Sep Gate ADC

CAMAC Model 2249W 12 Channel Analog-to-Digital Converter

The LeCroy Model 2249W is a 12 channel,11-bit integrateng-type analog-to-digital converter. It features excellent Iinearity and unprecedented stability,thus allowing operation at wide gates of up to 10 usec. Thus, the 2249W is compatible with Csl and Nal crystal detectors. Its minimum gate of 30 nsec makes its use with organic scintillators and Cerenkov detectors possible in all but the highest rate conditions.

The 2249W has been optimized for dynamic range and linearity. By AC-coupling the input, 11-bit (1980 counts) operation has been achieved with +/- 2 count integral linearity. This excellent linearity is maintained from the smallest signal size to signals as large as - 2 V.

The test feature allows all 12 ADC's to simultaneously digitize a charge proportional to a DC level provided to a front-panel connector or patched into the CAMAC Dataway connector. In addition, the pedestals alone can be checked on-line by the same test feature by removing the CAMAC inhibit (1) during the test.

The Model 2249W offers an excellent event rate capability through the incorporation of a 2 usec fast clear, which permits the ADC's to begin digitizing and then be cleared upon receipt of later trigger information rather than delaying the analog signals with long cables while the trigger decision is being made. In addition, rapid readout is made possible by a convenient Q and LAM suppress feature, side- panel adjustable between 0 and 100 counts. This feature permits an empty 2249W to be overlooked in a CAMAC readout cycle.

SPECIFICATIONS CAMAC Model 2249W 12 CHANNEL ANALOG-TO-DIGITAL CONVERTER

Analog Inputs:

12; Lemo type connectors; charge sensitive (current integrating); AC coupled (2 msec time constant, field changeable); 50 ohm impedance; linear range normally 0 to - 2.0 V; protected to +/- 50 V against 1 usec transients.

Gain:

- 0.25 pC/count +/- 5%

Full-Scale Range:

Approximately - 500 pC (maximum count -- 1980)

Integral Non-Linearity:

+/-0.05% +/-(0.5 pC +0.1%)

ADC Resolution:

0.05% (1980 total counts)

Long Term Stability:

Better than 0.25% of reading +/- 0.5 pC/week (at constant temperature)

ADC Isolation:

A 5 V, 20 nsec overload pulse in any one ADC disturbs data in any other ADC by no more than 0.5 pC (2 counts).

Gate Input:

One gate common to all ADC's; Lemo type connector; 50 ohm impedance; - 600 mV or greater enables; minimum duration, 30 nsec; maximum recommended duration up to 10 usec; partial analog input must occur within 0.5 Msec after opening gate to preserve accuracy; effective opening and closing times, 5 nsec; internal delay, 7 nsec.

Fast Clear:

One front panel input common to all ADC's Lemo type connector;50 Ohm impedance; -600 mV or greater clears, minimum duration, 50 nsec. Requires additional 2.0 usec settling time.

Pedestal:

Adjustable over approximately 100 counts via side-panel accessed trimmer capacitor. Somewhat higher for wide gate.

Test Function:

With CAMAC I present, the positive DC level applied to front panel "Test" input(internal high impedance connection to + 12 V) or optional rear connector P1, P2, or P5 patch points will inject charge with a proportionality constant of - 15 pC/V into all inputs at F(25)-S2 time. (With CAMAC I not present, F(25).S2 will generate the gate only, providing a measure of the pedestal.)

Digitizing Time:

106 usec

Readout Time:

Readout may proceed at the fastest rate permitted by the CAMAC standard after digitization is complete.

Readout Control:

Ready for readout when LAM signal appears. Refer to ESONE Committee Report EUR4100e and EUR4600e for additional timing details, voltages, logic levels, impedances, and other standards.

Data:

The proper CAMAC function and address command normally gates the 11 binary bits of the selected channel onto the the Rl to Rll (20 to 210) Dataway bus lines.

CAMAC Commands:

Z or C:

ADC'sand LAM are cleared by the CAMAC "Clear"or"Initializd" command; requires S2. Z also disables LAM.

1:

Gate input is inhibited during CAMAC "Inhibit" command. (Test function is enabled.)

Q:

A Q = 1 response is generated in recognition of an F(0) or F(2) Read function or an F(8) function if LAM is set for a valid "N" and "A", but there will be no response (Q = 0) under any other condition. The Q response for empty modules can be suppressed (see Q and LAM suppression).

X:

An X=1 (Command Accepted) response is generated when a valid F, N,and A command is generated.

L:

A Look-At-Me signal is generated from end of conversion until a module Clear or Clear LAM. LAM is disabled for the duration of N, can be permanently enabled or disabled by the Enable and Disable function command, and can be tested by test LAM. Standard option causes LAM to be suppressed for empty modules.

CAMAC Function Codes:

F(0):

Read registers; requires N and A; A(0) through A(11) are used for channel address.

F(2):

Read registers and Clear module and LAM; requires N and A: (clears on A(11) only).

F(8):

Test Look-At-Me; requires N and any A from A(0) to A(11) independent of Disable Look-At-Me. Q response is generated if LAM is set.

F(9):

Clear module and LAM: requires N, S2, and any A from A(0) to A(11).

F(l 0):

Clear Look-At-Me; requires N, S2 and any A from A(0) to A(11).

F(24):

Disable Look-At-Me; requires N, S2, and any A from A(0) to A(11).

F(25):

Test module; requires N, S2 and any A from A(0) to A(11).

F(26):

Enable Look-At-Me; requires N, S2 and any A from A(0) to A(11). Remains enabled until Z or F(24) applied.

Caution: the state of the LAM mask will be arbitrary after power turn-on.

Q and LAM Suppression:

Adjustable potentiometer (accessed from side of module) sets count level required (from 0 to 100) before data is considered useful. A module in which all channels contain less than set amount will produce no Q response or LAM and appears during readout as an empty CAMAC slot, thus reducing readout time. A Command Accept response is still generated. The LAM suppress portion can be disabled with a solder jumper option.

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Analog Inputs:	12; Lemo type connectors; charge sensitive (current integrating); AC coupled (2 msec time constant, field changeable); 50 ohm impedance; linear range normally 0 to - 2.0 V; protected to +/- 50 V against 1 usec transients.
Gain:	- 0.25 pC/count +/- 5%
Full-Scale Range:	Approximately - 500 pC (maximum count -- 1980)
Integral Non-Linearity:	+/-0.05% +/-(0.5 pC +0.1%)
ADC Resolution:	0.05% (1980 total counts)
Long Term Stability:	Better than 0.25% of reading +/- 0.5 pC/week (at constant temperature)
ADC Isolation:	A 5 V, 20 nsec overload pulse in any one ADC disturbs data in any other ADC by no more than 0.5 pC (2 counts).
Gate Input:	One gate common to all ADC's; Lemo type connector; 50 ohm impedance; - 600 mV or greater enables; minimum duration, 30 nsec; maximum recommended duration up to 10 usec; partial analog input must occur within 0.5 Msec after opening gate to preserve accuracy; effective opening and closing times, 5 nsec; internal delay, 7 nsec.
Fast Clear:	One front panel input common to all ADC's Lemo type connector;50 Ohm impedance; -600 mV or greater clears, minimum duration, 50 nsec. Requires additional 2.0 usec settling time.
Pedestal:	Adjustable over approximately 100 counts via side-panel accessed trimmer capacitor. Somewhat higher for wide gate.
Test Function:	With CAMAC I present, the positive DC level applied to front panel "Test" input(internal high impedance connection to + 12 V) or optional rear connector P1, P2, or P5 patch points will inject charge with a proportionality constant of - 15 pC/V into all inputs at F(25)-S2 time. (With CAMAC I not present, F(25).S2 will generate the gate only, providing a measure of the pedestal.)
Digitizing Time:	106 usec
Readout Time:	Readout may proceed at the fastest rate permitted by the CAMAC standard after digitization is complete.
Readout Control:	Ready for readout when LAM signal appears. Refer to ESONE Committee Report EUR4100e and EUR4600e for additional timing details, voltages, logic levels, impedances, and other standards.
Data:	The proper CAMAC function and address command normally gates the 11 binary bits of the selected channel onto the the Rl to Rll (20 to 210) Dataway bus lines.
CAMAC Commands:
Z or C:	ADC'sand LAM are cleared by the CAMAC "Clear"or"Initializd" command; requires S2. Z also disables LAM.
1:	Gate input is inhibited during CAMAC "Inhibit" command. (Test function is enabled.)
Q:	A Q = 1 response is generated in recognition of an F(0) or F(2) Read function or an F(8) function if LAM is set for a valid "N" and "A", but there will be no response (Q = 0) under any other condition. The Q response for empty modules can be suppressed (see Q and LAM suppression).
X:	An X=1 (Command Accepted) response is generated when a valid F, N,and A command is generated.
L:	A Look-At-Me signal is generated from end of conversion until a module Clear or Clear LAM. LAM is disabled for the duration of N, can be permanently enabled or disabled by the Enable and Disable function command, and can be tested by test LAM. Standard option causes LAM to be suppressed for empty modules.
CAMAC Function Codes:
F(0):	Read registers; requires N and A; A(0) through A(11) are used for channel address.
F(2):	Read registers and Clear module and LAM; requires N and A: (clears on A(11) only).
F(8):	Test Look-At-Me; requires N and any A from A(0) to A(11) independent of Disable Look-At-Me. Q response is generated if LAM is set.
F(9):	Clear module and LAM: requires N, S2, and any A from A(0) to A(11).
F(l 0):	Clear Look-At-Me; requires N, S2 and any A from A(0) to A(11).
F(24):	Disable Look-At-Me; requires N, S2, and any A from A(0) to A(11).
F(25):	Test module; requires N, S2 and any A from A(0) to A(11).
F(26):	Enable Look-At-Me; requires N, S2 and any A from A(0) to A(11). Remains enabled until Z or F(24) applied.
Caution: the state of the LAM mask will be arbitrary after power turn-on.
Q and LAM Suppression:	Adjustable potentiometer (accessed from side of module) sets count level required (from 0 to 100) before data is considered useful. A module in which all channels contain less than set amount will produce no Q response or LAM and appears during readout as an empty CAMAC slot, thus reducing readout time. A Command Accept response is still generated. The LAM suppress portion can be disabled with a solder jumper option.