LeCroy 2372 Memory Look-up, ECL

CAMAC Model 2372 Memo Lookup Unit

The Model 2372 is a 64 K-bit dual-ported random access memory based upon the Fermilab module ECL-2. Its access time is <= 60 nsec. Packaged in a single-width CAMAC module, the unit offers an exceptionally high capacity/speed product while dissipating < 12 W. Battery backup maintains the integrity of the data within the 2372 (for 2 years) when the CAMAC crate is shut off. This continuous memory feature is particularly useful during the startup phases of an experiment. The MLU serves as a fundamental element of a trigger processor. It also may be used to provide complex functions required of trigger logic.

In normal use, the MLU is first downloaded with the required trigger data and then verified via CAMAC. This information, which defines the function of the MLU, is accessed via the front panel for real time applications. The Model 2372 offers 16-bit front panel Data-in and Data-Out connectors, although not all 32 bits may be used at once. The dimensionality of the Model 2372 is selected via CAMAC to serve the application. The dimensionality options are:

DIMENSIONALITY	INPUT WORD SIZE (Bits)	MEMORY SIZE	OUTPUT WORD SIZE (Bits)
0	16	64K	1
1	15	32K	2
2	14	16K	4
3	13	8K	8
4	12	4K	16

The function of the MLU may be user defined to meet the application. The required function is downloaded via CAMAC. Virtually any function may be defined: angle logic or clusterized track multiplicity are examples of complex trigger functions. When used as a trigger processor element, the MLU may be used for any operation which is a one-to-one mapping. In conjunction with an ADC, the MLU can be loaded with the calibration to energy. The MLU can also be loaded with a digital comparator function or any arithmetic calculation.

The strobe facilities of the Model 2372 are used in the software selectable Strobed Mode. In this mode, the MLU is strobed by the ECL Input Enable signals, coming from previous logic unit(s). After 60 nsec, the output "word" of the MLU becomes valid along with four ECL Output Ready signals which may be used to strobe the output word into other modules like the 2372. The output word remains static until another Input Enable is received. This automatically accounts for the propagation delay of the unit. Four Output Ready's are sup- plied to allow the 2372 to drive multiple logic units. Four Input Enables are provided with an Enable condition being defined as their coincidence (unused inputs are set to logical 1).

The Model 2372 may also be used without regard to the strobe logic. In the Transparent Mode, the output of the Model 2372 may change without regard for the Input Enables. This mode bypasses the latch circuitry and thus provides a slight speed advantage, offering a throughput time of only 55 nsec. This difference is reflected in the Input Enable, Output Ready timing when the Transparent Mode is selected.

SPECIFICATIONS CAMAC Model 2372

INPUTS

Input Word: Up to 16 bits, ECL levels via 17-pair header. Pin-outs match ECLine Standard. Im- pedance 100 Ohm +/- 5%, high impedance by simple user modification. Minimum width 10 nsec in the Strobed mode or 65 nsec in the Transparent mode. Number of active bits depends upon Dimensionality.

Input Enable: Four differential ECL inputs via 2-pin headers. Required only in Strobed mode. Must ar- rive >=2 nsec after Input word is settled. Minimum width-Strobed mode: 10 nsec, Transparent mode: 65 nsec (if used).

OUTPUTS

Output Word: Up to 16 bits, ECL levels via 17-pair header. Pin-outs match the ECLine Standard. Out- put width depends upon Operating mode. Number of active bits depends upon Dimensionality.

Output Ready: Four differential ECL outputs via 2-pin headers. Occurs >= 5 nsec after the outputs are settled.

Propagation Delay: 60 nsec. Input Enable to Output Ready-Strobed mode. Transparent mode: 20 nsec after a new Input word becomes valid, the Output word becomes indeterminate. The cor- rect Output word appears within 55 nsec of the new Input word.

CONTROL

Dimensionality Control: CAMAC selected via CAMAC Control Register (CCR). Defines the number of inputs and outputs.

Mode Control: CAMAC selected via CCR.
Strobed Mode-The leading Edge of Enable condition (and of four Input Enables, unused inputs set to logical 1 state) latches Input word. Output Ready's become false within 30 nsec. Output word becomes invalid within 30 nsec. New Output word settled and Output Ready's true within <= 60 nsec. Ready and Output word remain until the next Enable condition.
Transparent Mode-operates without regard to Input Enables. Output word present for duration of input word after approximately <= 55 nsec delay.
Inhibit Mode-disables front panel inputs to allow CAMAC programming of memory.

MEMORY PROTECTION

Continuous Memory: Memory battery back-up. This feature preserves contents of memory and CCR during CAMAC power down. Life of the battery is two years of operation.

CAMAC COMMANDS

F(0)-A(0): Read 1 to 16-bit Output word addressed by CAMAC Address Register (CAR). Increment CAR. Requires operation in Inhibit mode. Inactive bits are not masked and are arbitrary.

F(0)-A(1): Read 16-bit CAR address. Requires operation in Inhibit mode. Inactive bits are set to 1 if F(16)-A(l) was executed after power up.

F(0)-A(2): Read 5-bit CCR word.

F(0)-A(3): Read 1 to 16-bit Output word addressed by front panel Input word. Inactive bits are not masked and are arbitrary.

F(0)-A(4): Read 12 to 16-bit front panel Input Word.

F(16)-A(0): Write 16-bit word into memory location addressed by CAR. Requires operation in Inhibit mode. Write commands are performed with dimensionality of four. See Owner's Manual.

F(16)-A(1): Write 12 to 16-bit CAR address. Dataword at ECL output will change accordingly. Re- quires operation in Inhibit mode.

F(16)-A(2): Write 5-bit CCR word. MMDDD
D = Dimensionality
D = 0 Input Word Size = 16 bits, Output Word size = 1 bit. Memory is configured as 64K*1
D = 1 Input Word Size = 15 bits, Output Word size = 2 bits. Memory is configured as 32K*2
D = 2 Input Word Size = 14 bits, Output Word size = 4 bits. Memory is configured as 16K*4
D = 3 Input Word Size = 13 bits, Output Word size = 8 bits. Memory is configured as 8K*8
D = 4 to 7 Input Word Size = 12 bits, Output Word size = 16 bits. Memory is configured as 4K*16
M = Mode
M = 0 Strobed Mode. Input flip-flops receive the Input Word and drive the address bus.
M = 1 Transparent Mode. Input Buffers (without latches) receive the Input Word and drive the address bus.
M = 2 or 3 Inhibit Mode. The CAR receives the Input Word from CAMAC and drives the address bus. The front panel flip-flops and buffers are disabled. Used for writing and reading the RAMS and CAR.

Q: A Q = 1 response is generated for F(16)-A(0) and F(0)-A(0), A Q = 0 response is generated for these commands when CAR reaches terminal count. This Q Response is valid only when CAR has been loaded via F(16)-A(1) after power up.

X: An X= 1 response is generated for any valid N-F-A.

GENERAL

Power: < 1.25 A @ +6V
<850mA @ -6V

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INPUTS
Input Word:	Up to 16 bits, ECL levels via 17-pair header. Pin-outs match ECLine Standard. Im- pedance 100 Ohm +/- 5%, high impedance by simple user modification. Minimum width 10 nsec in the Strobed mode or 65 nsec in the Transparent mode. Number of active bits depends upon Dimensionality.
Input Enable:	Four differential ECL inputs via 2-pin headers. Required only in Strobed mode. Must ar- rive >=2 nsec after Input word is settled. Minimum width-Strobed mode: 10 nsec, Transparent mode: 65 nsec (if used).
OUTPUTS
Output Word:	Up to 16 bits, ECL levels via 17-pair header. Pin-outs match the ECLine Standard. Out- put width depends upon Operating mode. Number of active bits depends upon Dimensionality.
Output Ready:	Four differential ECL outputs via 2-pin headers. Occurs >= 5 nsec after the outputs are settled.
Propagation Delay:	60 nsec. Input Enable to Output Ready-Strobed mode. Transparent mode: 20 nsec after a new Input word becomes valid, the Output word becomes indeterminate. The cor- rect Output word appears within 55 nsec of the new Input word.
CONTROL
Dimensionality Control:	CAMAC selected via CAMAC Control Register (CCR). Defines the number of inputs and outputs.
Mode Control:	CAMAC selected via CCR. Strobed Mode-The leading Edge of Enable condition (and of four Input Enables, unused inputs set to logical 1 state) latches Input word. Output Ready's become false within 30 nsec. Output word becomes invalid within 30 nsec. New Output word settled and Output Ready's true within <= 60 nsec. Ready and Output word remain until the next Enable condition. Transparent Mode-operates without regard to Input Enables. Output word present for duration of input word after approximately <= 55 nsec delay. Inhibit Mode-disables front panel inputs to allow CAMAC programming of memory.
MEMORY PROTECTION
Continuous Memory:	Memory battery back-up. This feature preserves contents of memory and CCR during CAMAC power down. Life of the battery is two years of operation.
CAMAC COMMANDS
F(0)-A(0):	Read 1 to 16-bit Output word addressed by CAMAC Address Register (CAR). Increment CAR. Requires operation in Inhibit mode. Inactive bits are not masked and are arbitrary.
F(0)-A(1):	Read 16-bit CAR address. Requires operation in Inhibit mode. Inactive bits are set to 1 if F(16)-A(l) was executed after power up.
F(0)-A(2):	Read 5-bit CCR word.
F(0)-A(3):	Read 1 to 16-bit Output word addressed by front panel Input word. Inactive bits are not masked and are arbitrary.
F(0)-A(4):	Read 12 to 16-bit front panel Input Word.
F(16)-A(0):	Write 16-bit word into memory location addressed by CAR. Requires operation in Inhibit mode. Write commands are performed with dimensionality of four. See Owner's Manual.
F(16)-A(1):	Write 12 to 16-bit CAR address. Dataword at ECL output will change accordingly. Re- quires operation in Inhibit mode.
F(16)-A(2):	Write 5-bit CCR word. MMDDD D = Dimensionality D = 0 Input Word Size = 16 bits, Output Word size = 1 bit. Memory is configured as 64K1 D = 1 Input Word Size = 15 bits, Output Word size = 2 bits. Memory is configured as 32K2 D = 2 Input Word Size = 14 bits, Output Word size = 4 bits. Memory is configured as 16K4 D = 3 Input Word Size = 13 bits, Output Word size = 8 bits. Memory is configured as 8K8 D = 4 to 7 Input Word Size = 12 bits, Output Word size = 16 bits. Memory is configured as 4K*16 M = Mode M = 0 Strobed Mode. Input flip-flops receive the Input Word and drive the address bus. M = 1 Transparent Mode. Input Buffers (without latches) receive the Input Word and drive the address bus. M = 2 or 3 Inhibit Mode. The CAR receives the Input Word from CAMAC and drives the address bus. The front panel flip-flops and buffers are disabled. Used for writing and reading the RAMS and CAR.
Q:	A Q = 1 response is generated for F(16)-A(0) and F(0)-A(0), A Q = 0 response is generated for these commands when CAR reaches terminal count. This Q Response is valid only when CAR has been loaded via F(16)-A(1) after power up.
X:	An X= 1 response is generated for any valid N-F-A.
GENERAL
Power:	< 1.25 A @ +6V <850mA @ -6V