CAMAC Model 4303 Time to FERA Converter (TFC)

The LeCroy Model 4303 Time-to-FERA Converter (TFC) provides a timing front-end for the LeCroy Fast Encoding and Readout TDC (FEReT) System. It is a time-to-charge converter and connects directly to the LeCroy Model 4300 Fast Encoding and Readout ADC (FERA).

The Model 4303 TFC simultaneously captures 16 time intervals and transfers them to the Model 4300 FERA for digital conversion. The Model 4303 can work accepting both a COMMON START and 16 individual STOP signals or a COMMON STOP and 16 individual START signals. A rear panel switch allows selection of the mode. In both modes the module requires a pulse at the origin of the time interval to be explored, which is internally used to generate the gate to FERA. The 4303 then outputs a GATE and 16 individual signals to the Model 4300 ADC. The 16 individual signals have constant amplitude, but width proportional to captured START-STOP time interval. Front panel potentiometers allow adjustment of both the gate width and the analog output amplitude to match user's requirements on time resolution and time range with the dynamic range of the FERA ADC used. Using an 11-bit FERA, time resolutions from 50pSec to 500pSec can be obtained with corresponding time ranges from 102.4nSec to 1024nSec.

Time and Charge may now be measured by one fast data acquisition system and data be treated with similar procedures. Timing information can also complement charge information for application in second level trigger decisions.

The Model 4303 TFC brings the powerful and elegant features of the FERA System to time interval measurement. These include 100kHz data acquisition rates; programmable built-in options for pedestal subtraction and data compaction; CAMAC and/or fast 10 M word/sec data transfers to event buffers, trigger processors, or programmable data processors; and complete calibration/test facilities. 

SPECIFICATIONS CAMAC Model 4303 Time to FERA Converter

INPUT CHARACTERISTICS
Common Start (STRT): Front panel 2-pin connector; 110 Ohm input impedance; accepts complementary ECL pulses; minimum width 5 nSec.  In COMMON START mode acts as a common timing start  for the 16 channels and induces the generation of the GATE output. In COMMON STOP mode it just induces generation of the GATE output. Note that in the latter mode, in absence of other reference signals, this input can be fed by the grand OR of the individual inputs. However, care must be taken to compensate the OR delay on the individual input's paths.
Individual Inputs (INPUTS): 16 inputs in a front panel 34-pin connector; 110 Ohm input impedance; accepts complementary ECL pulses; minimum width 5 nSec; in COMMON START mode act as individual stops for each channel and in absence of a signal, a stop is automatically generated at overflow time; inputs are inactive unless preceeded by a COMMON START pulse. In COMMON STOP mode act as individual starts for each channel. In this mode the inputs are always active, that is for every input an analog output to FERA will be generated. However the analog output will not be sensed by FERA unless associated with a gate signal.
Common Stop (TEST and STOP): Two paralleled front panel 2-pin connectors; 110 Ohm input impedance; accepts complementary ECL pulses; minimum width 5 nSec. Acts as a common timing stop both in COMMON START and COMMON STOP modes; in the former mode it can be used for on line testing of the unit.  Unused input must be left unconnected.
OUTPUT CHARACTERISTICS
Gate (GATE): Front  panel  2-pin  connector;  provides differential ECL  pulses; activated  by the Common Start input; generates a pulse having width slightly greater than the longest possible Analog Output; used as a gate to the subsequent FERA module.
Analog Outputs (OUT): 16 outputs in a front panel 34-pin connector; high output impedance current sources; generate single ended analog pulses having width equal to the START - STOP time interval and amplitude correlated to the selected time resolution; these outputs have to be connected to the analog inputs of the subsequent FERA module.
GENERAL
Gate Width: Front panel screwdriver adjustable potentiometer allowing adjustment of the gate width to FERA and therefore of the time full scale. Adjustable between 100nSec and 1pSec.
Analog Output Amplitude: Front panel screwdriver adjustable potentiometer, common to the 16 channels, allowing adjustment of the analog output amplitude between 500uA and 5mA.
Time Resolution: Adjustment of both the gate width and the analog output amplitude allows the user to match his application with the particular FERA used (10 or 11 bit). When an 11-bit FERA is being used the time resolution can be adjusted typically from 50pSec to 500pSec with corresponding full scale ranges from 102.4nSec to 1024nSec.
Packaging: RF shielded #1 width CAMAC module.
Power Requirements: - 6V, 1.5A
- 24V, 200mA

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