MM-6290 Data Sheet

256 Mbyte, 64 Data Bits, 64 Mbytes/sec VME/VME64 DRAM Memory Module

FEATURES:

• Capacity: 8M, 16M, 32M, 64M, 128M, 256M bytes
• Cycle/Access Time:
  Random Read: 200/175 nsec
  Random Write: 175/50 nsec
  Block Transfer Read: 125/100 nsec
  Block Transfer Write: 100/45 nsec
• VMEbus-compatible: per Rev. D: A32/A24, D64/D32/D16/D8 (UAT)
• Block transfer (BLT): within 256 bytes in the D32 mode, and 2 Kbytes in the D64 mode
• Parity: Parity generation and checking on each byte
• Module selection: on 1 Mbyte boundaries, with switch-selectable lower and upper limits
• Lifetime Warranty on parts and labor

DESCRIPTION:

Providing up to 256 Mbytes of DRAM at 64 Mbytes/sec data rates, the MM-6290D memory module also operates with a 64-bit word per VMEbus specification Rev. D. Extensive use of surface mount technology allows the module to occupy a single 6U card slot.

The MM-6290D supports A32/A24, D64/D32/D16/D8. Besides the D64 block mode read and write accesses, the MM-6290D responds to A32 and A24 address modifiers for long word, word and byte transfers. Address modifier codes are programmed into a socketed IFL, which allows A32 or A24 masters to access memory when residing on the same bus. The memory module also supports long word, word, unaligned and byte read, write and read-modify-write accesses. Module selection is on 1 Mbyte boundaries, with switch-selectable upper and lower limits.

Each 8-bit byte has an associated bit for parity error detection. Parity status is stored and transmitted via BERR*; asserting BERR* inhibits the DTACK* signal during memory read operations.

Ensuring module reliability, complete inspection and testing is performed while running memory diagnostics. In addition, all units undergo 48 hours of burn-in while running diagnostics. Furthermore, Micro Memory backs up board reliability with a Lifetime Warranty.

SPECIFICATIONS:

Capacity

8M, 16M, 32M, 64M bytes; 128M, 256M bytes

Cycle/Access Time (nsec)

Random Read: 200/175

Write: 175/50

Block Transfer Read: 125/100

Write: 100/45

Address

A32/A24 address bits

Data In/Data Out

D64/D32/D16/D8

Sequential Access

Block transfer (BLT) within 256 bytes in the D32 mode, and 2 Kbytes in the D64 mode

Address Modifiers

6-bit, decoded by socketed IFL with the following codes:

A24: 39, 3A, 3D and 3E

A32: 09, 0A, 0D and 0E

A24 with BLT: 38, 3F

A32 with BLT: 0B, 0F

A24/D64 with BLT: 38, 3C

A32/D64 with BLT: 08, 0C

Parity

Byte-wide parity generation and checking. Parity output stored and transmitted via BERR*

Interface

VMEbus-compatible per Rev. D

Modes of Operation

Read, write, read-modify-write, long word, word, unaligned, block transfer

Refresh

Hidden refresh

Memory Selection

1 Mbyte boundaries, switch-selectable for the upper and lower limits

Operating Temperature

0 to 60 degrees (Celsius)

Storage Temperature

-40 to 85 degrees (Celsius)

Relative Humidity

Up to 95% without condensation

Power Requirements:

+5V (Fully-Populated)

Operate 4.6A (max.)